diff --git a/modules/spi/nrfer_spi_alive/nrfer_spi_alive.ino b/modules/spi/nrfer_spi_alive/nrfer_spi_alive.ino
new file mode 100644
index 0000000000000000000000000000000000000000..31ca6b51f06ed04fccacb645a41484f5511f09bb
--- /dev/null
+++ b/modules/spi/nrfer_spi_alive/nrfer_spi_alive.ino
@@ -0,0 +1,129 @@
+#include <AccelStepper.h>
+#include "pins.h"
+
+AccelStepper stepper(AccelStepper::DRIVER, STEP_PIN, DIR_PIN);
+
+void setup() {
+  pinMode(LED_PIN_1, OUTPUT);
+  pinMode(LED_PIN_2, OUTPUT);
+  pinMode(LED_PIN_3, OUTPUT);
+  outclr(LED_PIN_1);
+  outclr(LED_PIN_2);
+  outclr(LED_PIN_3);
+
+  stepper.setEnablePin(ENABLE_PIN);
+  stepper.setPinsInverted(false, false, true);
+  stepper.setMaxSpeed(10000.0);
+  stepper.setAcceleration(1000.0);
+  stepper.enableOutputs();
+  stepper.moveTo(5000);
+
+  SPI_Setup();
+
+  Serial.begin(115200);
+}
+
+uint32_t ticker = 0;
+bool cntr = true;
+
+void loop() {
+  ticker ++;
+
+  if (stepper.distanceToGo() == 0 ) {
+    stepper.moveTo(-stepper.currentPosition());
+  }
+
+  //stepper.run();
+
+  if (!(ticker % 25000)) {
+    SPI_Test();
+    if (cntr) {
+      cntr = false;
+      outclr(LED_PIN_2);
+    } else {
+      cntr = true;
+      outset(LED_PIN_2);
+    }
+  }
+}
+
+#define NRF_SPI_BUFFER_SIZE 4 // 5 8-bit words, making up:
+#define NRF_SPI_NUM_BUFFER 1 // one buffer, one 40-bit word
+
+typedef struct SPIArrayList {
+  uint8_t buffer[NRF_SPI_BUFFER_SIZE];
+} SPIArrayList_type;
+
+SPIArrayList_type RX_Buffer[NRF_SPI_NUM_BUFFER]; // 3 words
+SPIArrayList_type TX_Buffer[NRF_SPI_NUM_BUFFER];
+
+void SPI_Setup() {
+  /*
+     NRF52 Datasheet pg 283: must cfg pins for GPIO 1st
+     CS: Output, value 0
+     SCK: Output, value 'same as CONFIG.CPOL' (so dep. on SPI mode)
+     MOSI: Output, value 0
+     MISO: Input
+  */
+  NRF_GPIO->DIRSET = (1 << CS_PIN);
+  NRF_GPIO->DIRSET = (1 << SCK_PIN);
+  NRF_GPIO->DIRSET = (1 << MOSI_PIN);
+  NRF_GPIO->DIRSET = (0 << MISO_PIN);
+  /*
+     Enabling SPI, setting pins
+     CS Pin is not associated with this module, u do u
+  */
+  NRF_SPIM0->ENABLE = SPIM_ENABLE_ENABLE_Enabled;
+  NRF_SPIM0->PSEL.SCK = SCK_PIN;
+  NRF_SPIM0->PSEL.MOSI = MOSI_PIN;
+  NRF_SPIM0->PSEL.MISO = MISO_PIN;
+  /*
+     Frequency
+  */
+  NRF_SPIM0->FREQUENCY = SPI_FREQUENCY_FREQUENCY_K250;
+  /*
+     Config
+  */
+  NRF_SPIM0->CONFIG = (SPIM_CONFIG_CPOL_Msk << SPIM_CONFIG_CPOL_ActiveHigh) |
+                      (SPIM_CONFIG_CPHA_Msk << SPIM_CONFIG_CPHA_Leading) |
+                      (SPIM_CONFIG_ORDER_Msk << SPIM_CONFIG_ORDER_MsbFirst);
+  /*
+     DMA to Send Buffers
+  */
+  NRF_SPIM0->TXD.MAXCNT = NRF_SPI_BUFFER_SIZE * NRF_SPI_NUM_BUFFER;
+  NRF_SPIM0->TXD.PTR = (uint32_t)&TX_Buffer;
+  NRF_SPIM0->RXD.MAXCNT = NRF_SPI_BUFFER_SIZE * NRF_SPI_NUM_BUFFER;
+  NRF_SPIM0->RXD.PTR = (uint32_t)&RX_Buffer;
+
+  //outset(CS_PIN);
+}
+
+void SPI_Test() {
+  for (int i = 0; i < NRF_SPI_NUM_BUFFER; i++) {
+    TX_Buffer[i].buffer[0] = 0x6F; // addr. byte
+    TX_Buffer[i].buffer[1] = 0x00;
+    TX_Buffer[i].buffer[2] = 0x00;
+    TX_Buffer[i].buffer[3] = 0x00;
+  }
+
+  NRF_SPIM0->EVENTS_STARTED = 0;
+  NRF_SPIM0->EVENTS_END = 0;
+  outclr(CS_PIN); // go lo
+  NRF_SPIM0->TASKS_START = 1;
+
+  outset(LED_PIN_3);
+  while (NRF_SPIM0->EVENTS_STARTED == 0) {} // wait 4 start
+  outclr(LED_PIN_3);
+  outset(LED_PIN_1);
+  while (NRF_SPIM0->EVENTS_END == 0) {} // does the business
+  outclr(LED_PIN_1);
+  outset(CS_PIN);
+}
+
+void outclr(uint8_t pin) {
+  NRF_GPIO->OUTCLR = (1 << pin);
+}
+
+void outset(uint8_t pin) {
+  NRF_GPIO->OUTSET = (1 << pin);
+}
diff --git a/modules/spi/nrfer_spi_alive/pins.h b/modules/spi/nrfer_spi_alive/pins.h
new file mode 100644
index 0000000000000000000000000000000000000000..f78d12872a91d4ee7397eb32af48b862802c1ad8
--- /dev/null
+++ b/modules/spi/nrfer_spi_alive/pins.h
@@ -0,0 +1,20 @@
+#ifndef PINS_H
+#define PINS_H
+
+#define LED_PIN_1   20 // R 
+#define LED_PIN_2   11 // G
+#define LED_PIN_3   12 // B
+
+#define STEP_PIN    13
+#define DIR_PIN     18
+#define ENABLE_PIN  3
+
+#define DIAG0       7
+#define DIAG1       9
+
+#define MOSI_PIN    14
+#define MISO_PIN    10
+#define SCK_PIN     16
+#define CS_PIN      19
+
+#endif