Skip to content
Snippets Groups Projects
Commit 21e63570 authored by Andreas Färber's avatar Andreas Färber Committed by Freddie Chopin
Browse files

arm_adi_v5: Add part numbers for Infineon XMC4000 family


This was found on multiple XMC4500:

	Valid ROM table present
		Component base address 0xe00ff000
		Peripheral ID 0x00001c11db
		Designer is 0x0c1, Infineon (Siemens)
		Part is 0x1db, Unrecognized
		Component class is 0x1, ROM table
		MEMTYPE system memory present on bus

On multiple XMC4700 and an XMC4800 this was found instead:

	Valid ROM table present
		Component base address 0xe00ff000
		Peripheral ID 0x00001c11df
		Designer is 0x0c1, Infineon (Siemens)
		Part is 0x1df, Unrecognized
		Component class is 0x1, ROM table
		MEMTYPE system memory present on bus

Name them "XMC4500 ROM" and "XMC4700/4800 ROM" respectively.

Change-Id: If369a6d16524004ba439b878f090a313a9f3a760
Signed-off-by: default avatarAndreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3482


Tested-by: jenkins
Reviewed-by: default avatarFreddie Chopin <freddie.chopin@gmail.com>
parent 2b2f6711
Branches
No related tags found
No related merge requests found
...@@ -1040,6 +1040,8 @@ static const struct { ...@@ -1040,6 +1040,8 @@ static const struct {
{ ARM_ID, 0xd07, "Cortex-A57 Debug", "(Debug Unit)", }, { ARM_ID, 0xd07, "Cortex-A57 Debug", "(Debug Unit)", },
{ ARM_ID, 0xd08, "Cortex-A72 Debug", "(Debug Unit)", }, { ARM_ID, 0xd08, "Cortex-A72 Debug", "(Debug Unit)", },
{ 0x09f, 0xcd0, "Atmel CPU with DSU", "(CPU)" }, { 0x09f, 0xcd0, "Atmel CPU with DSU", "(CPU)" },
{ 0x0c1, 0x1db, "XMC4500 ROM", "(ROM Table)" },
{ 0x0c1, 0x1df, "XMC4700/4800 ROM", "(ROM Table)" },
{ 0x0c1, 0x1ed, "XMC1000 ROM", "(ROM Table)" }, { 0x0c1, 0x1ed, "XMC1000 ROM", "(ROM Table)" },
{ 0x0E5, 0x000, "SHARC+/Blackfin+", "", }, { 0x0E5, 0x000, "SHARC+/Blackfin+", "", },
{ 0x0F0, 0x440, "Qualcomm QDSS Component v1", "(Qualcomm Designed CoreSight Component v1)", }, { 0x0F0, 0x440, "Qualcomm QDSS Component v1", "(Qualcomm Designed CoreSight Component v1)", },
......
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please to comment