results from daisy-chain uart message passing

3f7efb68 · Jake Read · dcc252a2 · 3f7efb68 · 3f7efb68 · 3f7efb68
Commit 3f7efb68 authored 7 years ago by Jake Read
--- a/README.md
+++ b/README.md
@@ -5,18 +5,16 @@
 Currently:

 ### Jake
- - Hardware 0.2
- - Measure Packet Propagation
- - Implement Switching Structure in Hardware
+ - 

 ### Nick
- - Work w/ Patrick on implementing Dijkstra's in simulation
+ - 

 ### Dougie
 - 

 ### Patrick
- - Work on implementing hardware emulation in simulation
+ - 

 ## Hardware


--- a/circuit/xmega-128a4u-switch/xmega-128a4u-switch_01/eagle.epf
+++ b/circuit/xmega-128a4u-switch/xmega-128a4u-switch_01/eagle.epf
@@ -350,107 +350,11 @@ UsedLibraryUrn="urn:adsk.eagle:library:177"
 UsedLibrary="D:/Dropbox (Personal)/CBA/doc/libraries/eagle/fab.lbr"

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--- a/embedded/atxmega-a4u-wakeup/.vs/atxmega-a4u-wakeup/v14/.atsuo
+++ b/embedded/atxmega-a4u-wakeup/.vs/atxmega-a4u-wakeup/v14/.atsuo
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.elf
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.elf
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.hex
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/atxmega-a4u-wakeup.hex
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 S9030000FC
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/main.o
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/main.o
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/tinyport.o
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/Debug/tinyport.o
--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/main.c
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/main.c
@@ -27,6 +27,25 @@ tinyport_t tp2;
 tinyport_t tp3; //nhat used at the moment
 tinyport_t tp4;

+uint8_t tpacket1[70];
+uint8_t tpacket2[7];
+
+void testpacket1(tinyport_t *tp){
+	PORTC.OUTSET = PIN3_bm;
+	for(int i = 0; i < 70; i ++){
+		tp_write(&tp4, tpacket1[i]);
+	}
+	PORTC.OUTCLR = PIN3_bm;
+}
+
+void testpacket2(tinyport_t *tp){
+	PORTC.OUTSET = PIN3_bm;
+	for(int i = 0; i < 7; i ++){
+		tp_write(&tp4, tpacket2[i]);
+	}
+	PORTC.OUTCLR = PIN3_bm;
+}
+
 int main(void){
 	// Neil: overclocking (rad)
 	OSC.PLLCTRL = OSC_PLLFAC4_bm | OSC_PLLFAC3_bm; // 2 MHz * 24 = 48 MHz
@@ -38,7 +57,8 @@ int main(void){
 	// uart, port, rx, tx, stat
 	
 	tp1 = tp_new(&USARTC0, &PORTC, PIN2_bm, PIN3_bm, PIN4_bm);
-	tp_init(&tp1);
+	//tp_init(&tp1);
+	PORTC.DIRSET = PIN3_bm;
 	
 	tp2 = tp_new(&USARTC1, &PORTC, PIN6_bm, PIN7_bm, PIN5_bm); 
 	tp_init(&tp2);
@@ -49,6 +69,10 @@ int main(void){
 	tp4 = tp_new(&USARTD1, &PORTD, PIN6_bm, PIN7_bm, PIN5_bm);
 	tp_init(&tp4);
 	
+	PORTD.DIRCLR = PIN1_bm;
+	PORTD.DIRCLR = PIN0_bm; // button ready
+	PORTD.PIN1CTRL = PORT_OPC_PULLUP_gc;
+	PORTD.PIN0CTRL = PORT_OPC_PULLUP_gc;
 			
 	// system interrupt setup (allow low level interrupts)
 	PMIC.CTRL |= PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
@@ -56,28 +80,49 @@ int main(void){
 	// globally enable interrupts 
 	sei();
 	
-	while(1){
+	tpacket1[0] = 126; // start delimiter
+	tpacket1[1] = 1; // destination address (this and lower)
+	tpacket1[2] = 2; // # edges from source
+	tpacket1[3] = 4; // source address
+	tpacket1[4] = 64; // # of bytes in payload
+	tpacket1[69] = 126;
+	
+	tpacket2[0] = 126; // start delimiter
+	tpacket2[6] = 126; // end delimiter
+	
 	uint8_t data;
+	
+	while(1){
 		tp_statflash(&tp1);
+		if(tp2.pstate == TP_PSTATE_HASPACKET){
+			tp_stathi(&tp3);
+			PORTC.OUTSET = PIN3_bm;
 			
-		if(tp_read(&tp2, &data)){
-			tp_statflash(&tp3);
+			tp_write(&tp4, 126);
+			while(tp_read(&tp2, &data)){
 				tp_write(&tp4, data);
 			}
+			tp_write(&tp4, 126);
+			
+			PORTC.OUTCLR = PIN3_bm;
+			tp_statlo(&tp3);
+			tp2.pstate = TP_PSTATE_OUTSIDE;
+		} else if (!(PORTD.IN & PIN1_bm)){
+			tp_stathi(&tp3);
+			testpacket1(&tp4);
+			tp_statlo(&tp3);
+			_delay_ms(500); // basically, debounce button
+		} else if (!(PORTD.IN & PIN0_bm)) {
+			tp_stathi(&tp3);
+			testpacket2(&tp4);
+			tp_statlo(&tp3);
+			_delay_ms(500);
+		}
 		
 		// the below only works when bounded by nointerrupts() and interrupts();
 	}
 }

-uint8_t pcount = 0;
-uint8_t psize = 12;
-
-// passing 2 -> 4
-
-void handoff(tinyport_t *tp_from){ // puts data in 'core' of system
-	//
-}
-
 /*
 turns off global interrupt control
 my understanding is that interrupts still get scheduled, but not executed

--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.c
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.c
@@ -71,7 +71,7 @@ void tp_rxISR(tinyport_t *tp){ // towards a passalong
 			break;
 		case TP_PSTATE_INSIDE:
 			if(tp->bumpdata == 126){
-				tp->pstate = TP_PSTATE_OUTSIDE;
+				tp->pstate = TP_PSTATE_HASPACKET;
 			} else {
 				rb_put(&tp->rbrx, tp->bumpdata);
 			}
@@ -92,7 +92,7 @@ uint8_t tp_read(tinyport_t *tp, uint8_t *data){ // TODO: set at pointer, return
 // https://lost-contact.mit.edu/afs/sur5r.net/service/drivers+doc/Atmel/ATXMEGA/AVR1307/code/doxygen/usart__driver_8c.html#7fdb922f6b858bef8515e23229efd970

 void tp_write(tinyport_t *tp, uint8_t data){
-	while(!(tp->uart->STATUS & USART_DREIF_bm)); // while not ready, wait (this is blocking)
+	while(!(tp->uart->STATUS & USART_DREIF_bm)); // while not ready, wait (needs work a better way)
 	tp->uart->DATA = data;
 }


--- a/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.h
+++ b/embedded/atxmega-a4u-wakeup/atxmega-a4u-wakeup/tinyport.h
@@ -14,7 +14,7 @@
 #define TP_TXBUF_SIZE 128
 #define TP_RXBUF_SIZE 128
 #define TP_UART_BAUDCONTROLB 0
-#define TP_UART_BAUDCONTROLA 155 // 19200: 155, 1M: 2
+#define TP_UART_BAUDCONTROLA 2 // 19200: 155, 115200: 25, 230400: 12, 428600: 6, 1M: 2, 1.5M: 1, 3M: 0

 #define TP_RX_STATE_EMPTY 0
 #define TP_RX_STATE_HASDATA 1
@@ -24,6 +24,7 @@

 #define TP_PSTATE_OUTSIDE 0
 #define TP_PSTATE_INSIDE 1
+#define TP_PSTATE_HASPACKET 2 

 typedef struct {
 	USART_t *uart;

--- a/results/daisychain/daisychain-measurement.jpg
+++ b/results/daisychain/daisychain-measurement.jpg
--- a/results/daisychain/daisychain-setup.jpg
+++ b/results/daisychain/daisychain-setup.jpg
--- a/results/daisychain/daisychain.md
+++ b/results/daisychain/daisychain.md
+# Daisy Chained Message Passing
+
+## Setup
+
+In this baseline test, our switches are connected in series. On receiving a packet on Port 2, it is automatically forwarded to Port 4, with no computation done otherwise. This will give us a baseline performance metric while developing algorithms that necessarily perform *some* computation with each packet before forwarding it, as well as handling messages on multiple ports, etc.
+
+![img of setup](https://github.com/jakeread/tinynets/blob/master/results/daisychain/daisychain-setup.jpg)  
+
+We test a packet that is 70 Bytes long - 560 bits and a packet that is 7 bytes long (our minimum). The code used to buffer and pass the message is included under /results/daisychain/code . Each switch sets a pin high during the interval that it is sending bytes, and we use a logic analyzer to track this status across multiple switches. This is how we measure message passing time.
+
+![img of logic](https://github.com/jakeread/tinynets/blob/master/results/daisychain/daisychain-measurement.jpg)  
+
+Results are as follows. The expected T_message is simply (bits/packet)/bitrate - any additional message time is due to system design and implementation. Critically, UART uses a start and stop bit, per byte.
+
+Bitrate | T_message (us) | P_size | T_message* (us) | % Difference
+--- | --- | --- | --- 
+115200 | 4861 | 70 | 5858 | 21
+115200 | 486 | 7 | 586 | 21
+230400 | 2431 | 70 | 2930 | 21 
+230400 | 243 | 7 | 295 | 21 
+428600 | 1307 | 70 | 1580 | 21 
+428600 | 131 | 7 | 161 | 23 
+1M | 560 | 70 | 679 | 21
+1M | 56 | 7 | 71 | 27
+3M | 187 | 70 | 245 | 31
+3M | 19 | 7 | 43 | 126
+
+Critically, we see a ~20% increase with lower bitrates - largely due to the extra two bits (start and stop) per packet. At higher bitrates, processor overhead also becomes apparent, nearly doubling message times. This is a key indicator that our system performance will hinge on driving switch computation to a minimum, an observation made in class...
--- a/results/daisychain/daisychain_19200.logicdata
+++ b/results/daisychain/daisychain_19200.logicdata
--- a/results/daisychain/src/main.c
+++ b/results/daisychain/src/main.c
+/*
+ * atxmega-a4u-wakeup.c
+ *
+ * Created: 10/19/2017 11:24:49 PM
+ * Author : Jake
+ */ 
+
+#define BUTTON1 0 // on port D
+#define BUTTON1_bm (1 << BUTTON1)
+#define BUTTON2 1 // on port D
+#define BUTTON2_bm (1 << BUTTON2)
+
+#define BLINK_DELAY_MS 500
+#define F_CPU 20000000UL // so that the system knows how many clock ticks are in one second, so that delay functions are accurate
+
+#define NEWLINE 0x0A
+
+#include <avr/io.h>
+#include <avr/interrupt.h> // NEED this for Interrupts - only to use sei() to enable global interrupt flag
+#include <util/delay.h>
+
+#include "ringbuffer.h"
+#include "tinyport.h"
+
+tinyport_t tp1; //power, at the moment
+tinyport_t tp2;
+tinyport_t tp3; //nhat used at the moment
+tinyport_t tp4;
+
+uint8_t tpacket1[70];
+uint8_t tpacket2[7];
+
+void testpacket1(tinyport_t *tp){
+	PORTC.OUTSET = PIN3_bm;
+	for(int i = 0; i < 70; i ++){
+		tp_write(&tp4, tpacket1[i]);
+	}
+	PORTC.OUTCLR = PIN3_bm;
+}
+
+void testpacket2(tinyport_t *tp){
+	PORTC.OUTSET = PIN3_bm;
+	for(int i = 0; i < 7; i ++){
+		tp_write(&tp4, tpacket2[i]);
+	}
+	PORTC.OUTCLR = PIN3_bm;
+}
+
+int main(void){
+	// Neil: overclocking (rad)
+	OSC.PLLCTRL = OSC_PLLFAC4_bm | OSC_PLLFAC3_bm; // 2 MHz * 24 = 48 MHz
+	OSC.CTRL = OSC_PLLEN_bm; // enable PLL
+	while (!(OSC.STATUS & OSC_PLLRDY_bm)); // wait for PLL to be ready
+	CCP = CCP_IOREG_gc; // enable protected register change
+	CLK.CTRL = CLK_SCLKSEL_PLL_gc; // switch to PLL
+		
+	// uart, port, rx, tx, stat
+	
+	tp1 = tp_new(&USARTC0, &PORTC, PIN2_bm, PIN3_bm, PIN4_bm);
+	//tp_init(&tp1);
+	PORTC.DIRSET = PIN3_bm;
+	
+	tp2 = tp_new(&USARTC1, &PORTC, PIN6_bm, PIN7_bm, PIN5_bm); 
+	tp_init(&tp2);
+	
+	tp3 = tp_new(&USARTD0, &PORTD, PIN2_bm, PIN3_bm, PIN4_bm);
+	tp_init(&tp3);
+	
+	tp4 = tp_new(&USARTD1, &PORTD, PIN6_bm, PIN7_bm, PIN5_bm);
+	tp_init(&tp4);
+	
+	PORTD.DIRCLR = PIN1_bm;
+	PORTD.DIRCLR = PIN0_bm; // button ready
+	PORTD.PIN1CTRL = PORT_OPC_PULLUP_gc;
+	PORTD.PIN0CTRL = PORT_OPC_PULLUP_gc;
+			
+	// system interrupt setup (allow low level interrupts)
+	PMIC.CTRL |= PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
+	
+	// globally enable interrupts 
+	sei();
+	
+	tpacket1[0] = 126; // start delimiter
+	tpacket1[1] = 1; // destination address (this and lower)
+	tpacket1[2] = 2; // # edges from source
+	tpacket1[3] = 4; // source address
+	tpacket1[4] = 64; // # of bytes in payload
+	tpacket1[69] = 126;
+	
+	tpacket2[0] = 126; // start delimiter
+	tpacket2[6] = 126; // end delimiter
+	
+	uint8_t data;
+	
+	while(1){
+		tp_statflash(&tp1);
+		if(tp2.pstate == TP_PSTATE_HASPACKET){
+			tp_stathi(&tp3);
+			PORTC.OUTSET = PIN3_bm;
+			
+			tp_write(&tp4, 126);
+			while(tp_read(&tp2, &data)){
+				tp_write(&tp4, data);
+			}
+			tp_write(&tp4, 126);
+			
+			PORTC.OUTCLR = PIN3_bm;
+			tp_statlo(&tp3);
+			tp2.pstate = TP_PSTATE_OUTSIDE;
+		} else if (!(PORTD.IN & PIN1_bm)){
+			tp_stathi(&tp3);
+			testpacket1(&tp4);
+			tp_statlo(&tp3);
+			_delay_ms(500); // basically, debounce button
+		} else if (!(PORTD.IN & PIN0_bm)) {
+			tp_stathi(&tp3);
+			testpacket2(&tp4);
+			tp_statlo(&tp3);
+			_delay_ms(500);
+		}
+		
+		// the below only works when bounded by nointerrupts() and interrupts();
+	}
+}
+
+/*
+turns off global interrupt control
+my understanding is that interrupts still get scheduled, but not executed
+when interrupts are turned back on, they fire.
+*/
+void nointerrupts(){
+	PMIC.CTRL |= ~PMIC_LOLVLEN_bm | ~PMIC_MEDLVLEN_bm | ~PMIC_HILVLEN_bm;
+}
+
+/*
+turns on global interrupt control
+*/
+void interrupts(){
+	PMIC.CTRL |= PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
+}
+
+// hookup ISRs to port-abstracted interrupt functions
+
+ISR(USARTC0_RXC_vect){
+	tp_rxISR(&tp1);
+}
+
+
+ISR(USARTC1_RXC_vect){
+	tp_rxISR(&tp2);
+}
+
+ISR(USARTD0_RXC_vect){
+	tp_rxISR(&tp3);
+}
+
+ISR(USARTD1_RXC_vect){
+	tp_rxISR(&tp4);
+}
+
+
+/*
+ISR(USARTC1_DRE_vect){
+	tp_txISR(&tp2);
+}
+
+ISR(USARTC0_DRE_vect){
+	tp_txISR(&tp1);
+}
+
+ISR(USARTD0_DRE_vect){
+	tp_txISR(&tp3);
+}
+
+ISR(USARTD1_DRE_vect){
+	tp_txISR(&tp4);
+}
+*/
\ No newline at end of file
--- a/results/daisychain/src/ringbuffer.c
+++ b/results/daisychain/src/ringbuffer.c
+#include "ringbuffer.h"
+#include <stdlib.h>
+#include <avr/io.h>
+
+uint8_t rb_init(ringbuffer_t *rb, size_t size){
+	rb->size = size;
+	rb->buffer = malloc(rb->size);
+	rb_reset(rb);
+	return 1;
+}
+
+uint8_t rb_reset(ringbuffer_t *rb){
+	if(rb){
+		rb->head = 0;
+		rb->tail = 0;
+		return 1;
+	} else {
+		return 0;
+	}
+}
+
+
+uint8_t rb_put(ringbuffer_t *rb, uint8_t data){
+	if(rb){
+		rb->buffer[rb->head] = data;
+		rb->head = (rb->head + 1) % rb->size; // for wrap around
+		if(rb->head == rb->tail){
+			rb->tail = (rb->tail + 1) % rb->size;
+		}
+		return 1;
+	} else {
+		return 0;
+	}
+}
+
+uint8_t rb_get(ringbuffer_t *rb, uint8_t *data){
+	if(rb && data && !rb_empty(*rb)){
+		*data = rb->buffer[rb->tail];
+		rb->tail = (rb->tail + 1) % rb->size;
+		return 1;
+	} else {
+		return 0;
+	}
+}
+
+uint8_t rb_empty(ringbuffer_t rb){
+	return (rb.head == rb.tail);
+}
+
+uint8_t rb_full(ringbuffer_t rb){
+	return ((rb.head + 1) % rb.size) == rb.tail;
+}
\ No newline at end of file
--- a/results/daisychain/src/ringbuffer.h
+++ b/results/daisychain/src/ringbuffer.h
+#ifndef RINGBUFFER_H
+#define RINGBUFFER_H
+
+/*
+a ringbuffer,
+s/o https://github.com/dhess/c-ringbuf
+s/o https://embeddedartistry.com/blog/2017/4/6/circular-buffers-in-cc
+*/
+
+#include <avr/io.h>
+#include <stdlib.h>
+#include <stdint.h>
+#include <stddef.h>
+#include <stdbool.h>
+
+typedef struct {
+	uint8_t * buffer;
+	size_t head;
+	size_t tail; 
+	size_t size;
+} ringbuffer_t;
+
+uint8_t rb_init(ringbuffer_t *rb, size_t size);
+
+// sets tail to head
+uint8_t rb_reset(ringbuffer_t *rb);
+
+// writes one byte to next slot
+uint8_t rb_put(ringbuffer_t *rb, uint8_t data);
+
+// reads one byte from buffer
+uint8_t rb_get(ringbuffer_t *rb, uint8_t *data);
+
+uint8_t rb_empty(ringbuffer_t rb);
+
+uint8_t rb_full(ringbuffer_t rb);
+
+#endif
\ No newline at end of file